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ORCIDACM Transactions on Reconfigurable Technology and Systems, Volume 19
Volume 19, Number 1, March 2026
Section: Original Articles
- Weihai Xu
, Jin Zhang, Zheng Zhou, Hang Yang, Shifeng Huang, Yin Tang, Yiming Jiang, Jiangxing Wu:
On-Demand Regular Expression Matching on FPGAs for Efficient Deep Packet Inspection. 1:1-1:32 - Zhuorong Liang, Siqi Deng, Tao Su:
TernaryGNNs: A High-Throughput, Area-Efficient Ternary Weight GNNs Inference Framework on CPU-FPGA Heterogeneous Platform. 2:1-2:31 - Xiaoyu Mao, Qinming Zhou, Xiao Chen, Tao Su:
Novel Security Threats in Multi-Tenant FPGAs: Phase Tuning for Voltage Sensors in Remote Power Side-Channel Analysis Attacks on AES. 3:1-3:28 - Abdul Wadood, Alec Lu, Haikai Zhao, Zhenman Fang:
FORCv2: A High-Throughput Streaming FPGA Accelerator for Optimized Row Columnar File Format Processing in Big Data Engines. 4:1-4:33 - Miguel Jiménez Arribas, Agustín Martínez-Hellín, Manuel Prieto Mateo:
High-Performance RISC-V CSR Access in FPGAs: Optimized Microarchitecture for Efficient Decoding and Multiplexing. 5:1-5:34 - Wenjie Wang, Bo Peng, Jianguo Yao, Haibing Guan:
Zero2M: Optimizing Tenant-Level I/O Management for Future Faster NVMe Storage with FPGA. 6:1-6:34
Section: FPT 2025 Journal Track, Part II
- Yuan Zhang, Jiliang Zhang:
MCT-TRNG: Multi-Channel Tetrahedral TRNG via Metastability-Enhanced Entropy with 2.2 Gbps Throughput. 7:1-7:21 - Wenheng Ma, Xinhao Yang, Shulin Zeng, Tengxuan Liu, Libo Shen, Hongyi Wang, Shiyao Li, Ke Hong, Zhenhua Zhu, Xuefei Ning, Tsung-Yi Ho, Guohao Dai, Yu Wang:
CD-LLM: A Heterogeneous Multi-FPGA System for Batched Decoding of 70B+ LLMs Using a Compute-Dedicated Architecture. 8:1-8:25 - Ruthwik Reddy Sunketa, Muhammad Ali Farooq, Ganesh Gore, Allen Boston, Pierre-Emmanuel Gaillardon, Aman Arora:
OpenFPGA-NoC: Automated Fabric and Bitstream Generation for NoC-based FPGAs. 9:1-9:32 - Ahmad Sedigh Baroughi, Manoj B. Rajashekar, Akhil Raj Baranwal, Zhenman Fang:
HiSpMM: High Performance High Bandwidth Sparse-Dense Matrix Multiplication on HBM-equipped FPGAs. 10:1-10:25 - Wenbin Teng, Wenqi Lou, Teng Wang, Lei Gong, Chao Wang, Xuehai Zhou:
TETRIS: A Novel FPGA Virtualization Framework for Fine-grained Sharing via Hierarchical Reconfiguration. 11:1-11:32 - Wenbo Zhang, Yan Zhang, Yiqi Liu, Lingjie Wu, Xingtong Hu:
REATA: An Efficient Vision Transformer Accelerator Featuring a Resource-Optimized Attention Design on Versal ACAP. 12:1-12:32 - Chang Sun, Zhiqiang Que, Vladimir Loncar, Wayne Luk, Maria Spiropulu:
da4ml: Distributed Arithmetic for Real-time Neural Networks on FPGAs. 13:1-13:27
Volume 19, Number 2, June 2026
Original Articles
- Miriam Leeser:
Artifact Evaluation in the FPGA Community and in ACM TRETS. 14e:1-14e:5 - Zhiqiang Que, Jose G. F. Coutinho, Ce Guo, Hongxiang Fan, Wayne Luk:
MetaML-Pro: Cross-Stage Design Flow Automation for Efficient Deep Learning Acceleration. 14:1-14:34 - Jiayong Li, Jonas Dann, Zhenhao He, Gustavo Alonso, Sai Rahul Chalamalasetti, Dejan S. Milojicic, Lance Evans, Alex Veprinsky, Runbin Shi:
StreamDedup: Distributed In-line Deduplication for Disaggregated Storage. 15:1-15:26 - Manuel de Castro, Roberto R. Osorio, Yuri Torres, Diego R. Llanos:
Pipelined FPGA Implementation of a Differential Evolution Engine for Optimization of Scientific Models. 16:1-16:25 - Arish Sateesan, Jo Vliegen, Nele Mentens:
Breaking the Scalability Barrier of Content Addressable Memories: A Probabilistic Alternative for Large-Key Associative Search. 17:1-17:26
Special Issue on Open Source Tools
- Seda Ogrenci Memik, Stephen Neuendorffer, Tobias Grosser, Fredrik Kjolstad, Marco Santambrogio, Nhan Tran, Evangeline F. Y. Young:
Introduction to the Special Issue on Open Source Tools for Reconfigurable Devices and Systems. 18:1-18:3 - Jan-Frederik Schulte, Benjamin Ramhorst, Chang Sun, Jovan Mitrevski, Nicolò Ghielmetti, Enrico Lupi, Dimitrios Danopoulos, Vladimir Loncar, Javier M. Duarte, David Burnette, Lauri Laatu, Stylianos Tzelepis, Konstantinos Axiotis, Quentin Berthet, Haoyan Wang, Paul White, Suleyman Demirsoy, Marco Colombo, Thea Klaeboe Aarrestad, Sioni Summers, Maurizio Pierini, Giuseppe Di Guglielmo, Jennifer Ngadiuba, Javier Campos, Benjamin Hawks, Abhijith Gandrakota, Farah Fahim, Nhan Tran, George A. Constantinides, Zhiqiang Que, Wayne Luk, Alexander D. Tapper, Duc Hoang, Noah Paladino, Philip C. Harris, Bo-Cheng Lai, Manuel Valentin, Ryan Forelli, Seda Ogrenci, Lino Gerlach, Rian Brooks Flynn, Mia Liu, Daniel Diaz, Elham E Khoda, Melissa Quinnan, Russell Solares, Santosh Parajuli, Mark S. Neubauer, Christian Herwig, Ho Fung Tsoi, Dylan Rankin, Shih-Chieh Hsu, Scott Hauck:
hls4ml: A Flexible, Open Source Platform for Deep Learning Acceleration on Reconfigurable Hardware. 19:1-19:35 - Benjamin Hawks, Jason Weitz, Dmitri Demler, Karla Tame-Narvaez, Dennis Plotnikov, Mohammad Mehdi Rahimifar, Hamza Ezzaoui Rahali, Audrey C. Therrien, Donovan Sproule, Elham E Khoda, Keegan A. Smith, Russell Marroquin, Giuseppe Di Guglielmo, Nhan Tran, Javier M. Duarte, Vladimir Loncar:
wa-hls4ml: A Benchmark and Surrogate Models for hls4ml Resource and Latency Estimation. 20:1-20:29 - Frans Skarman, Gustav Sörnäs, Oscar Gustafsson:
Spade - A Modern Hardware Description Language. 21:1-21:28 - Topi Leppänen, Leevi Leppänen, Zainab Jamil, Jan Solanti, Joonas Multanen, Pekka Jääskeläinen:
Composable Open Source Toolchain for Synthesizing Hardware Accelerators from OpenCL Command Buffers. 22:1-22:27 - Yaman Umuroglu, Christoph Berganski, Felix Jentzsch, Michal Danilowicz, Tomasz Kryjak, Charalampos Bezaitis, Magnus Själander, Ian Colbert, Thomas B. Preußer, Jakoba Petri-Koenig, Michaela Blott:
SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural Network Accelerators. 23:1-23:33 - Antonio Filgueras, Ismael el Basli, Juan Miguel De Haro Ruiz, Miquel Vidal, Carlos Álvarez, Daniel Jiménez-González, Xavier Martorell:
OmpSs@FPGA: An Open Source Framework for Programming FPGA Clusters. 24:1-24:33 - Gang Wu, Jiankun Lv, Yongzheng Chen, Shuaibo Yin, Ying Liu:
Towards High-Performance Flexible FPGA-Based Accelerators for CNN Inference: General Hardware Architecture and End-to-End Deploying Toolflow. 25:1-25:31 - G. Abarajithan, Zhenghua Ma, Ravidu Munasinghe, Francesco Restuccia, Ryan Kastner:
cgra4ml: A Hardware/Software Framework to Implement Neural Networks for Scientific Edge Computing. 26:1-26:33 - Javier Moya, Matthias Gabathuler, Mario Ruiz, Gustavo Alonso:
A Development Platform for Managed Heterogeneous Accelerated Compute Clusters: A Case Study on ETH Zurich's AMD HACC. 27:1-27:28 - Erwei Wang, Samuel Bayliss, Andra Bisca, Zachary Blair, Sangeeta Chowdhary, Kristof Denolf, Jeff Fifield, Brandon Freiberger, Erika Hunhoff, Phil James-Roxby, Jack Lo, Joseph Melber, Stephen Neuendorffer, Eddie Richter, André Rösti, Javier Setoain, Gagandeep Singh, Endri Taka, Pranathi Vasireddy, Zhewen Yu, Niansong Zhang, Jinming Zhuang:
From Loop Nests to Silicon: Mapping AI Workloads onto AMD NPUs with MLIR-AIR. 28:1-28:36 - Sebastian Wittlich, Hendrik Wöhrle, Tobias Krawutschke:
A Survey of FPGA Placement Algorithms: From Monolithic Devices to Multi-Die Architectures. 29:1-29:33 - Ilya Tuzov, David de Andrés, Juan-Carlos Ruiz-Garcia, Carles Hernández:
An Open Source Methodology to Emulate Transient Faults in ASIC Storage Cells Using AMD Ultrascale+ FPGAs. 30:1-30:28 - Qiyun Zhao, Shikai Guo, Wen Zhao, Ning Wang, Xiaochen Li, He Jiang:
FuncGNN: Learning Functional Semantics of Logic Circuits with Graph Neural Networks. 31:1-31:24
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