A design of 96 GS/s 7-bit DAC for high-speed wireline transmitter in 28-nm CMOS.

Junfei Deng Huolian Liu Chenxi Han Li Dang Hongzhi Liang Shubin Liu 0001 A design of 96 GS/s 7-bit DAC for high-speed wireline transmitter in 28-nm CMOS. 106863 2025 166 Microelectron. J. https://doi.org/10.1016/j.mejo.2025.106863 db/journals/mj/mj166.html#DengLHDLL25 streams/journals/mj