This repository presents the design of a CMOS based ANN using skywater 130nm PDK

• Introduction
• Block-Diagram
• Specifications
• Open Source Tools Used
• Clone This Repository
• Simulation Tools
  • Tools And PDK Used For Design and Simulations
    • Installation Of Tools And PDK
• Schematics And Simulations
  • Gilbert Cell Multiplier
    • Schematics
    • Simulations
  • Sigmoid Neural Activation Function
    • Schematics
    • Simulations
  • Simple ANN Network
    • Schematics
    • Simulations
  • CMOS ANN Implementation
    • Schematics
    • Simulations
• Executing The Simulations
• Observations
• Future Work
• Author
• Acknowledgements

An Artificial Neural Network (ANN) is a computational model inspired by the structure and functions of biological neural networks in the human brain. It consists of layers of interconnected nodes, called neurons, which process information through a system of weighted connections. Each neuron receives inputs, processes them through activation functions, and transmits outputs to other neurons in subsequent layers. This layered structure enables ANNs to learn complex patterns and relationships in data, making them powerful for tasks such as classification, regression, and even decision-making.

ANNs are a foundational element in machine learning and artificial intelligence, with applications in image and speech recognition, natural language processing, medical diagnostics, financial predictions, and many more fields. The training process for ANNs involves adjusting weights using algorithms like backpropagation, enabling them to improve performance on specific tasks by minimizing prediction errors. As they learn from data, ANNs can approximate complex functions and make predictions on unseen data, making them one of the most versatile tools in modern AI.

Designing a CMOS-based Artificial Neural Network (ANN) involves leveraging analog circuitry for efficient and low-power computation, which is particularly suited for edge computing applications and systems with strict energy constraints. In this approach, the Gilbert cell multiplier and a CMOS circuit implementation of the sigmoid activation function are key components.

The Gilbert cell is a well-known analog circuit structure used for multiplication, traditionally applied in frequency modulation and demodulation. For ANN design, each neuron connection (synapse) requires a multiplier to scale the input by a corresponding weight. The Gilbert cell provides a compact and efficient method for this multiplication in the analog domain. The basic configuration of a Gilbert cell uses a differential pair with cross-coupled transistors that produce an output current proportional to the product of the input signals. By using CMOS transistors in this structure, it can be made compatible with standard CMOS fabrication processes. This analog multiplication enables the neuron to process signals with minimal power and high speed compared to digital multipliers, which can be a bottleneck in traditional ANN implementations.

For a CMOS-based Gilbert cell, the output current I_out is proportional to the product of two differential input voltages V_x and V_y , given by:

I_out = (I_tail / 4V_T²) * V_x * V_y

where:

• I_tail: Tail current of the differential pairs
• V_T: Thermal voltage, approximately 26 mV at room temperature
• V_x = V_x1 - V_x2: Differential input voltage for the first pair
• V_y = V_y1 - V_y2: Differential input voltage for the second pair

This equation assumes small-signal operation, allowing the output current I_out to approximate the product of V_x and V_y in a linear fashion.

The sigmoid function, commonly used as an activation function in neural networks, introduces non-linearity, allowing the network to approximate complex functions and make decisions beyond simple linear separations. Implementing a sigmoid function in CMOS can be challenging due to its exponential nature. However, various CMOS circuit designs approximate the sigmoid curve effectively. One approach is to design a circuit that exploits the inherent characteristics of MOS transistors in weak or moderate inversion to approximate the exponential function. By setting up the transistors in specific configurations, it is possible to create an analog sigmoid-like response. For instance, a differential amplifier with MOSFETs biased appropriately can produce an output that resembles the sigmoid function’s shape, providing the necessary non-linearity for the ANN.

The block diagram of the proposed CMOS ANN can be found below:

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🔶 eSim

• eSim (previously known as Oscad / FreeEDA) is a free/libre and open source EDA tool for circuit design, simulation, analysis and PCB design. It is an integrated tool built using free/libre and open source software such as KiCad, Ngspice and GHDL. eSim is released under GPL.It can serve as an alternative to commercially available/licensed software tools like OrCAD, Xpedition and HSPICE.

  🔗 https://esim.fossee.in/home

🔶 Ngspice

• Ngspice is a mixed-level/mixed-signal electronic circuit simulator.

• Ngspice is based on three open-source free-software packages:

  • Spice3f5
  • Xspice
  • Cider1b1

  🔗 http://ngspice.sourceforge.net/

🔶 Sky130 PDK

• The SKY130 is a mature 180nm-130nm hybrid technology originally developed internally by Cypress Semiconductor before being spun out into SkyWater Technology and made accessible to general industry. SkyWater and Google’s collaboration is now making this technology accessible to everyone.

• The SKY130 Process Node is an extremely flexible offering, including many normally optional features as standard (features like the local interconnect, SONOS functionality, MiM capacitors, and more). This provides the designer with a wide range of flexibility in design choices.

  🔗 https://github.com/google/skywater-pdk

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• Clone this repository using git clone command

git clone https://github.com/Nalinkumar2002/cmos_ann.git

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• eSim
• Ngspice
• Skywater130 PDK

📥 eSim:

• Install the eSim tool using this website given below. Latest eSim version comes with Skywater130 PDK by default.

  🔗 https://esim.fossee.in/downloads

• You can also refer to the eSim Spoken Tutorial.

  🔗 https://spoken-tutorial.org/tutorial-search/?search_foss=eSim

📥 Ngspice :

• Install Ngspice using this website given below.

  🔗 http://ngspice.sourceforge.net/download.html

📥 Sky130 PDK :

• Use git clone method

git clone https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr

Place sky130_fd_pr folder in current working directory to avoid errors during simulations.

It is designed and made as subcircuit to use it as a symbol.

After creating the schematics, spice netlist was extracted with the help of esim and the necessary model files of sky130 models transistors were included in the netlist and transient analysis was performed.

💠 Input signal 100mv Vpp and frequency of 5kHz and 50kHz are given.

💠 Output of Gilbert cell multiplier - multiplied signal of 2 input signals

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It is designed and made as subcircuit to use it as a symbol.

After creating the schematics, spice netlist was extracted with the help of esim and the necessary model files of sky130 models transistors were included in the netlist and transient analysis was performed.

💠 Output of NAF - DC sweep is done from -1V to 1V

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💠 Input signal 100mv Vpp and frequency of 5kHz and 50kHz are given & 150mv Vpp and frequency of 3kHz and 30kHz are given.

💠 Multiplied signal outputs

💠 Simple ANN Output

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💠 Input signal with different frequency and voltages are given.

💠 CMOS ANN Output

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• Change directory to eSim-Files

cd Files/eSim-Files

• Run the neuron.cir.out file in ngspice to perform simulations

• Please check spice_lib folder is in current directory. It consists of skywater 130nm MOSFET models sky130_fd_pr__nfet_01v8__tt & sky130_fd_pr__nfet_01v8__tt.

neuron.cir.out

Note: To run simple neuron, naf, gilbert multiplier, run neuron1.cir.out , snaf.out and sgil.out

🏷️ The work demonstrates the VLSI implementation of artificial neural networks in CMOS technology node

🏷️ Analog components such as gilbert multipliers, adders and differential amplifiers are employed to realize the biological neural network.

🏷️ The response of the proposed CMOS neuron is approximately equivalent to that of the real neuron.

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🏁 Further improvements and modifications in this work can lead to the development of generic technology which results in the bidirectional communication between the living neurons and the micro-electronic neurons

🖊️ Nalinkumar S , B.E (Electronics and Communication Engineering), Madras Institute of Technology, Anna University, Tamil Nadu

📖 Kunal Ghosh, Co-Founder of VLSI System Design (VSD) Corp. Pvt. Ltd.