Riscv64 support?

[lachlansneff]

Apparently llvm has Risc-V64 support now, so is there a timeline on supporting a riscv64 toolchain for rust?

[japaric]

cc @rust-embedded/riscv

What kind of target do you have in mind? Bare metal or Linux?

A bare metal target like riscv32imc-unknown-none-elf needs less things from LLVM. For example, it's OK if the LLVM backend doesn't fully support atomics.

A Linux target needs, off the top of my head, fully working support for atomics and ELF TLS in the LLVM backend. Also, the standard libraries contains pieces of C code that need to be cross compiled to riscv64 using gcc: maybe unwinding support, backtrace support, jemalloc, etc. some you may be able to omit depending on which libc you use (gnu or musl).

[lachlansneff]

I'm looking into porting nebulet to risvc64, which would require riscv64imac-unknown-none-elf.

[japaric]

In that case the required work would involve:

• Upgrading the LLVM submodule if the current version rustc is using doesn't have the riscv64 support you need. This is the hardest part.

• Adding a built-in target. See this commit.

• Enabling builds of the rust-std component (pre-compiled core and compiler-builtins) for the new target iff the target is stable enough (no LLVM errors when compiling core and other crates). See this commit.

If someone volunteers to do the job I can review a PR that does steps 2 and 3. I can't, however, help with step 1; you are best asking the compiler team for help on that one.

[xxuejie]

Hey I dig into this problem a little bit, and after some trials I got a working prototype at here: https://github.com/xxuejie/rust/tree/riscv64

The first issue I encountered, is that Rust's current LLVM version has too strict checking: https://github.com/rust-lang/llvm/blob/caddcd9b9dc9479a20908d93c3e47c49b021379e/lib/Target/RISCV/RISCVISelLowering.cpp#L301. Luckily, this problem has been resolved in upstream LLVM: llvm-mirror/llvm@22abcbc#diff-e08aaff1bcaf5b99c78106d5d7d2f2e5. So updating LLVM submodule version used in Rust could solve this. In my prototype, I just cherry-picked the needed commits.

After that, another problem is that there're still instructions unimplemented even in upstream LLVM: https://github.com/llvm-mirror/llvm/blob/master/lib/Target/RISCV/RISCVInstrInfo.td#L477-L481. It seems the relevant part in this patch: https://github.com/lowRISC/riscv-llvm/blob/master/0044-RISCV-Add-initial-RV64I-codegen-support.patch is left out when merging to upstream. I guess maybe we will need a little help from @asb on the current status. In the meantime for my prototype I just copy over the code from the patch: xxuejie/llvm@8f01ea4, and the result is a Rust version that can compile to RISCV64.

So the above are 2 issues we need to solve to make Rust work. If you guys think this is a legit path I can start working on getting those changes into proper PRs for upstreams.

[asb]

Thanks for tagging me - I'm the code owner and primary author of the upstream RISC-V LLVM backend.

I've been working on getting RV64 support upstream. I recently authored an RFC to get feedback on the implementation approach: http://lists.llvm.org/pipermail/llvm-dev/2018-October/126690.html

I've followed that up with a stream of patches currently under review on Phabricator. These implement RV64IMAFD (and we get 'C' support for free based on the current upstream code). Note that in these in-flight patches, codegen for atomic cmpxchg isn't implemented on RV64, as I'm blocked on final review of my RV32A cmpxchg patch (see my RFC on safe atomics lowering for more background if interested).

Codegen quality is much better than the proof of concept patch previously shared.

See:

• Refactoring in preparation for immediate lowering https://reviews.llvm.org/D52961
• Immediate lowering https://reviews.llvm.org/D52962
• RV64I https://reviews.llvm.org/D53233
• New target hook to improve codegen https://reviews.llvm.org/D52978
• RV64M https://reviews.llvm.org/D53230
• RV64A (minus cmpxchg) https://reviews.llvm.org/D53233
• RV64F https://reviews.llvm.org/D53235
• RV64D https://reviews.llvm.org/D53237

I just updated a bunch of these after getting back from the LLVM Dev Meeting last week, so hopefully the review process will start to move forwards and we can get these merged.

I'm really excited to see interest in RV64 support in Rust and I'm keen to do what I can to support you in this. The immediate priority is pretty clear - get these patches merged upstream. Beyond that, please keep tagging me in issues that I can help with and of course file bug reports on bugs.llvm.org when appropriate.

[xxuejie]

Thanks @asb for your reply and awesome work! It's great to hear that RV64 support is in progress. We are also interested in contributing as much as we can to support RV64 port in Rust(and maybe also help test LLVM code for RV64 :P). In the meantime I guess we will wait for the new patches to land in upstream, and see how we can work from there.

[jethrogb]

• RV64I https://reviews.llvm.org/D53233

Probably meant https://reviews.llvm.org/D52977

[tarcieri]

Great news @asb!

What kind of target do you have in mind? Bare metal or Linux?

For me, initially a riscv64-unknown-linux-gnu or thereabouts target would be useful to me as I'm targeting the HiFive Unleashed, which comes preinstalled with Linux.

Eventually I'll be interested in non-Linux targets.

[memoryruins]

Status of patches as of January 26, 2019 🎉

title	status
Refactoring in preparation for immediate lowering	merged
Immediate lowering	merged
RV64I	merged
New target hook to improve codegen	merged
RV64M	merged
RV64A (minus cmpxchg)	merged
RV64F	needs review
RV64D	accepted

[fintelia]

If I understand correctly this means that rustc could now support a riscv64imac-unknown-none-elftarget?

[xxuejie]

I just did a check, it seems Rust team has just recently updated LLVM with changes till Jan 16. That means all the merged PRs above has landed in Rust's LLVM except RV64A, which was merged on Jan 17.

I think that means we can at least prepare a riscv64imc-unknown-none-elf rustc target now.